Help for compiling and running Riscv64 assembly on Amd64 system

In my research to try and run riscv64 assembly on amd64, i stumbled across this github repo https://github.com/riscv-collab/riscv-gnu-toolchain and downloaded its packages on my arch system through the aur but i can't seem to understand how to use it. Help would be greatly appreciated!

https://redd.it/1l5v2qf
@r_riscv

Linux 6.16 Preps For RISC-V's SBI Firmware Features Extension
https://www.phoronix.com/news/Linux-6.16-RISC-V

https://redd.it/1l5xi46
@r_riscv

Why can't I compress these instructions?

Why can't I use c.sw here instead of sw? The offsets seem small enough. I feel like I'm about to learn something about the linker. My goal is to align the data segment on a 4k boundary, only do one lui or auipc, and thereafter only use the %lo low offset to access variables, so I don't have to do an auipc or lui for every store. It works, but I can't seem to get compressed instructions. Trying to use auipc opens up a whole different can of worms.

.section .data
.align 12 # align to 4k boundary
data_section:
var1: .word 123
var2: .word 35
var3: .word 8823

.section .text
.globl _start

_start:
lui a0, %hi(data_section) # absolute addr
#auipc a0, %pcrel_hi(data_section) # pcrel addr
li a1, 2
sw a1, %lo(var2)(a0) # why is this not c.sw?
li a1, 3
sw a1, %lo(var3)(a0) # why is this not c.sw?

_end:
li a0, 0 # exit code
li a7, 93 # exit syscall
ecall


$ llvm-objdump -M no-aliases -d lui.x

lui.x:file format elf32-littleriscv

Disassembly of section .text:

000110f4 <_start>:
110f4: 37 35 01 00 lui a0, 0x13
110f8: 89 45 c.li a1, 0x2
110fa: 23 22 b5 00 sw a1, 0x4(a0)
110fe: 8d 45 c.li a1, 0x3
11100: 23 24 b5 00 sw a1, 0x8(a0)

00011104 <_end>:
11104: 01 45 c.li a0, 0x0
11106: 93 08 d0 05 addi a7, zero, 0x5d
1110a: 73 00 00 00 ecall

Not sure why the two sw's didn't automatically compress - the registers are in the compressed range, and the offsets are small multiples of 4. This is linker relaxation, right? This is what happens if I explicitly change the sw instructions to c.sw:

$ clang --target=riscv32 -march=rv32gc -mabi=ilp32d -c lui.s -o lui.o
lui.s:15:11: error: immediate must be a multiple of 4 bytes in the range [0, 124]
c.sw a1, %lo(var2)(a0) # why is this not c.sw?
^
lui.s:17:11: error: immediate must be a multiple of 4 bytes in the range [0, 124]
c.sw a1, %lo(var3)(a0) # why is this not c.sw?
^

But 4 and 8 are certainly multiplies of 4 byes in the range \[0, 124\] - so why won't this work?

https://redd.it/1l61nz9
@r_riscv

RISC-V knowledge cards for learning the foundamentals of Computer Architecture & Boolean Logic

Hi everyone! I’ve just finished creating an Anki deck focused on RISC-V basics and underlying computer architecture concepts.

For those who don't know, Anki is a popular app for spaced repetition learning, but you can also use it as a knowledge database, if you are not into that. Inside this collection of cards you’ll find:

* Explanations of RISC-V processor, calling conventions, and assembly instructions (with SVGs and HTML/CSS embeds for graphics).
* Sections on boolean logic and finite-state machines to build a solid digital logic foundation.
* Exercises, 3 interactive RISC-V CPU simulators from the web and lots of reference tables.

[A preview of a few of the cards in the deck](https://preview.redd.it/lbcahza82p5f1.png?width=1859&format=png&auto=webp&s=06850b49c441c1e14bdf61cfb473364e2314f00b)

Whether you’re new to RISC-V or brushing up on how a processor works, I really think you'll find this useful, so I decided to share it. It’s completely free to download and use, and of course, any feedback is welcome!

Here's the link: [https://ankiweb.net/shared/info/1737020042](https://ankiweb.net/shared/info/1737020042)

https://redd.it/1l6au2n
@r_riscv

I'm mostly new with embedded development and would like to try RISC-V for audio applications. Which dev boards should I be looking at?

Hi, I'd like to work on developing Eurorack audio modules using an embedded platform. I've done some light embedded programming before using environments like Arduino and am familiar with using C libraries.

I've been looking at other Arduino-like "all inclusive" environments for ARM like https://daisy.audio which is very appealing for a number of reasons but it doesn't seem like anything similar exists for RISC-V yet. RISC-V mostly appeals to me because it's the cool new kid on the block.

I'm not totally averse to doing the DSP on a Sigma chip or something but if possible I'd like to know about options that could run stereo or even four channels of audio DSP natively.

I'm somewhat confused by the options out there and was hoping to get some recommendations on dev boards and SDKs that would work well with a daughtercard with ADCs, DACs, and DSPs or that might include them OOB. Upcoming products are welcome as well. And while I did some Pascal+ASM back in my school days I'd like to avoid writing assembler lol.

Thanks!

https://redd.it/1l6ejsn
@r_riscv

The STM32F4 MCU Replacement. For learning Embedded RISC-V, I highly recommend WCH CH32V307VCT6. Anyone else using this?
https://redd.it/1l6v5kv
@r_riscv

CH32H417 Dual-Core RISC-V MCU Offers USB, Ethernet, and SerDes Support
https://linuxgizmos.com/ch32h417-dual-core-risc-v-mcu-offers-usb-ethernet-and-serdes-support/

https://redd.it/1l6x0a3
@r_riscv

I got rclone running on the original Duo
https://redd.it/1l6yvoi
@r_riscv

RISC-V processors designed and produced in EU?

Do you know of any in the EU?

I've seen FPGA concepts of course, but is there any real chip being made in the EU or the US/Canada/Australia?

I'm not thinking about Linux processors, but a small replacement for 8/32 bits.



BR,

S

https://redd.it/1l71z0v
@r_riscv

Ultra-High-Speed USB3.0 Dual-Core RSIC-V Interconnected MCU CH32H417
https://www.pistiz.com/usb3-0-dual-core-risc-v-mcu-ch32h417/

https://redd.it/1l71q8g
@r_riscv

What kind of experience is needed for RISC-V jobs ?


Hi, I’m currently a Compiler Engineer that worked on different NPU / GPU projects at several big US companies and startups.
I always had a passion for RISC-V, I studied it at university, read several books and implemented some personal projects on my free time, I event got to read some related papers for research, but I never worked on an actual RISC-V project.

Recently I came across a few European RISC-V Compiler roles that seemed amazing (I’m European). I applied to all but didn’t get a single interview.

Given that all I have is a passion for RISC-V and some personal projects, without any prior work experience, it’s not that surprising.

Do you have any advice on what I could do in my free time to improve my skills / knowledge and hopefully be able to land some interviews in the future ?

https://redd.it/1l7fxwi
@r_riscv

My Milk-V Megrez workstation with KDE, Supertuxkart and OpenRCT

https://redd.it/1l80rs1
@r_riscv